OpenCSD - CoreSight Trace Decode Library
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include
interfaces
trc_tgt_mem_access_i.h
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/*
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* \file trc_tgt_mem_access_i.h
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* \brief OpenCSD : Target memory read interface.
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*
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* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
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*/
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/*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
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#define ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
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class
ITargetMemAccess
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{
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public
:
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ITargetMemAccess
() {};
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virtual
~ITargetMemAccess
() {};
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virtual
ocsd_err_t
ReadTargetMemory
(
const
ocsd_vaddr_t
address,
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const
uint8_t cs_trace_id,
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const
ocsd_mem_space_acc_t
mem_space,
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uint32_t *num_bytes,
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uint8_t *p_buffer) = 0;
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};
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#endif
// ARM_TRC_TGT_MEM_ACCESS_I_H_INCLUDED
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/* End of File trc_tgt_mem_access_i.h */
ITargetMemAccess
Interface to target memory access.
Definition:
trc_tgt_mem_access_i.h:57
ITargetMemAccess::ITargetMemAccess
ITargetMemAccess()
Definition:
trc_tgt_mem_access_i.h:59
ITargetMemAccess::ReadTargetMemory
virtual ocsd_err_t ReadTargetMemory(const ocsd_vaddr_t address, const uint8_t cs_trace_id, const ocsd_mem_space_acc_t mem_space, uint32_t *num_bytes, uint8_t *p_buffer)=0
ITargetMemAccess::~ITargetMemAccess
virtual ~ITargetMemAccess()
Definition:
trc_tgt_mem_access_i.h:60
ocsd_mem_space_acc_t
enum _ocsd_mem_space_acc_t ocsd_mem_space_acc_t
ocsd_err_t
enum _ocsd_err_t ocsd_err_t
ocsd_vaddr_t
uint64_t ocsd_vaddr_t
Definition:
ocsd_if_types.h:310
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